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Theory of Operation 2-9
NovaJet 800 Series Service Manual
Gate Array
Figure 2-6. Gate Array.
The gate array contains the hardware logic for dot firing, monitoring
changes in the Carriage Assemblies position, controlling DMA through
the parallel port, and generating the PWM (Pulse Width Modulation)
waveforms for the servo controller. It also controls the stepper motor,
LCD and keypad.
The gate array is a Xilinx device. It is a static RAM-based field pro-
grammable gate array. This means that the logic that it implements is
determined by configuration information in internal RAM storage. Each
time power is turned on, this information must be downloaded from the
system ROM. This type of gate array allows for the flexibility of
upgrading the logic by simply downloading the new system software.
Digital Signal Processor (DSP)
The DSP converts raster data into the head buffer data format used by
the printheads. The gate array tells the DSP when to send data to the
carriage. The DSP runs at 192 MHz. It has 32M of dedicated SDRAM
that is separate from the DIMM the PowerPC uses.