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NI PXI/PCI-5124 Specifications 16 ni.com
Phase-Locked Loop (PLL) Reference Clock
Sample Clock Exporting
Exported Sample
Clock Destinations
Destination
Maximum
Frequency
*
Decimated
Sample Clock
only
CLK OUT (front panel
SMB connector)
210 MHz
PXI_Trig<0..6>
(backplane connector)
*
20 MHz
PFI<0..1> (front panel 9-pin
mini-circular DIN connector)
*
25 MHz
RTSI<0..6>
*
20 MHz
Specification Value Comments
Sources NI PXI-5124 NI PCI-5124 —
PXI_CLK10
(backplane connector
)
CLK IN (front panel SMB
connector)
RTSI 7
CLK IN (front panel SMB
connector)
Frequency
Range
1 MHz to 20 MHz in 1 MHz increments.
Default of 10 MHz.
The PLL Reference Clock frequency must be accurate
to ±50 ppm.
—
Duty Cycle
Tolerance
45% to 55% —
Exported
Reference Clock
Destinations
NI PXI-5124 NI PCI-5124 —
CLK OUT (front panel
SMB connector)
PFI<0..1> (front panel
9-pin mini-circular
DIN connector)
PXI_Trig<0..6>
(backplane connector)
CLK OUT (front panel
SMB connector)
PFI<0..1> (front panel
9-pin mini-circular
DIN connector)
RTSI<0..7>
Specification Value Comments