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Appendix A: M3295 OPMA Interface Pin definition table
Class Pin Dir Signal Signal Dir Pin Class
1
GND RSVD
2
3
RSVD GND
4
5
GND RSVD
6
7
RSVD GND
8
9
GND
DVI_TX0_H
10
11
LDRQ_L DVI_TX0_L
12
13
LFRAME_L GND
14
15
LAD0 DVI_TX1_H
16
17
LCLKRUN_L DVI_TX1_L
18
LPC 19
LAD1 GND
20
21
LAD2 DVI_TX2_H
22
23
LAD3 DVI_TX2_L
24
25
SERIRQ GND
26 DVI-I
27
LRST_L DVI_TX_CLK_H
28
29
LCLK DVI_TX_CLK_L
30
31
GND
GND
32
33
RSVD
DVI_DDC_DATA
34
35
RSVD
DVI_DDC_CLK
36
37
GND
RSVD
38
39
MCARD_I2C_PR
IVATE0_SCL
ANALOG_DDC_D
ATA
40
41
MCARD_I2C_PR
IVATE0_SDA
ANALOG_DDC_CL
K
42
43
GND GND
44
45
MCARD_I2C_IP
MB_SCL
ANALOG_RED
46
47
MCARD_I2C_IP
MB_SDA
ANALOG_GREEN
48
49
GND ANALOG_BLUE
50
I2C 51
MCARD_I2C_SI
DEBAND_NIC_S
CL
ANALOG_HSYNC
52
53
MCARD_I2C_SI
DEBAND_NIC_S
DA
ANALOG_VSYNC
54
55
MCARD_I2C_SI
DEBAND_NIC_A
LERT
GND
56
57
GND RSVD
58
59
MCARD_I2C_PR
IVATE1_SCL
RSVD
60
61
MCARD_I2C_PR
IVATE1_SDA
GND
62
63
GND
MCARD_FAN_PW
M_CPU
64