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Intel
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EP80579 Software for Security Applications on Intel
®
QuickAssist Technology
August 2009 PG
Order Number: 320183-004US 5
Contents—Security Software
12.4 Data Format ..................................................................................................... 64
12.4.1 Flat Buffers ........................................................................................... 64
12.4.2 Buffer List ............................................................................................. 65
12.5 Memory Management ........................................................................................ 65
12.6 Endianness and Alignment.................................................................................. 66
12.7 High-Level API Flow........................................................................................... 66
12.7.1 Cryptographic API Initialization and Shutdown............................................ 66
12.8 Intel
®
QuickAssist Technology Cryptographic API Data Flow.................................... 67
12.8.1 Completion of an Operation ..................................................................... 67
12.8.2 Symmetric Operations ............................................................................ 67
12.8.3 Asymmetric Operations........................................................................... 71
12.9 Using a Cryptographic Framework ....................................................................... 74
12.10 Accelerating Cryptographic Protocols.................................................................... 74
12.11 Error Handling .................................................................................................. 75
A NPF Copyright Notice............................................................................................... 76
Figures
1Intel
®
EP80579 Integrated Processor with Intel
®
QuickAssist Technology Block Diagram... 13
2 Software for Intel
®
EP80579 Integrated Processor product line ...................................... 15
3 Acceleration Access Layer and Acceleration APIs .......................................................... 16
4 Electronic Codebook (ECB) Mode................................................................................ 23
5 Cipher-Block Chaining (CBC) Mode ............................................................................. 24
6 Counter Mode.......................................................................................................... 24
7 ISR Sequence Diagram ............................................................................................. 37
8Intel
®
EP80579 Integrated Processor with Intel
®
QuickAssist Technology Block Diagram... 39
9Intel
®
EP80579 Integrated Processor Address Space .................................................... 40
10 Management Interface Layer Architecture Decomposition .............................................. 48
11 Sequence Diagram for DebugEnable Command ............................................................ 50
12 Sequence Diagram for DebugDisable Command ........................................................... 51
13 Sequence Diagram for VersionDumpAll Command ........................................................ 52
14 Sequence Diagram for setHC Command ...................................................................... 53
15 Sequence Diagram for SystemHealthCheck Command................................................... 54
16 Sequence Diagram for DataDump Command ............................................................... 55
17 Sequence Diagram for SetFileName Command............................................................. 56
18 Symmetric Asynchronous Intel
®
QuickAssist Technology Cryptographic API Data Flow ...... 62
19 Symmetric Synchronous Intel
®
QuickAssist Technology Cryptographic API Data Flow........ 63
20 Flat Buffer Diagram.................................................................................................. 65
21 Buffer List Diagram .................................................................................................. 65
22 NPF Copyright Notice................................................................................................ 76
Tables
1 Related Documents and Sample Code...........................................................................8
2 Reference Documents.................................................................................................8
3 Terms and Definitions.................................................................................................8
4 Development View ................................................................................................... 18
5 Deployment View..................................................................................................... 19
6 Cryptographic System Resource Variables ................................................................... 33
7 Resource Variables................................................................................................... 33
8 QAT-AL ISR Primitives .............................................................................................. 36
9 Memory Region Definitions........................................................................................ 38
10 ACPI Shared RAM Methods ........................................................................................ 40
11 Error Values for Other APIs ....................................................................................... 47