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DSP_iirlat
4-57 C64x+ DSPLIB Reference
rt = rt − (short)(b[i] >> 15) * k[i];
b[i + 1] = b[i] + (short)(rt >> 15) * k[i];
}
b[0] = rt;
r[j] = rt >> 15;
}
}
Special Requirements
- nk must be >= 4.
- No special alignment requirements
- See Bank Conflicts for avoiding bank conflicts
Implementation Notes
- Bank Conflicts: nk should be a multiple of 2, otherwise bank conflicts
occur.
- Interruptibility: The code is interrupt-tolerant but not interruptible.
- Prolog and epilog of the inner loop are partially collapsed and overlapped
to reduce outer loop overhead.
Benchmarks Cycles (2 * nk + 7) * nx + 9 (without bank conflicts)
Codesize 352 bytes