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CAN Getting Started Guide www.xilinx.com 9
UG186 April 19, 2010
Chapter 1
Introduction
The LogiCORE™ IP CAN v3.2 core is a compact, full-featured targeted design platform
that conforms to ISO 11898-1, CAN2.0A and CAN2.0B standards. Bit rates of up to 1 Mbps
are supported. The core size can be optimized using parameterized configurations for
acceptance filtering and FIFO depth. The example design in this guide is provided in both
Verilog and VHDL.
This chapter introduces the CAN core and provides related information, including system
requirements, recommended design experience, additional resources, technical support,
and submitting feedback to Xilinx.
About the Core
The CAN core is a Xilinx CORE Generator™ IP core, included in the latest IP Update on the
Xilinx IP Center. For detailed information about the core, see
www.xilinx.com/xlnx/xebiz/designResources/ip_product_details.
For information
about licensing options, see Chapter 2, “Licensing the Core.”
System Requirements
Windows
• Windows XP 2000 Professional 32-bit/64-bit
• Windows Vista Business 32-bit/64-bit
Linux
• Red Hat Enterprise Linux WS v4.0 32-bit/64-bit
• Red Hat Enterprise Desktop v5.0 32-bit/64-bit (with Workstation Option)
• SUSE Linux Enterprise (SLE) desktop and server v10.1 32-bit/64-bit
Software
• ISE® software v12.1
• Mentor Graphics ModelSim v6.5c and above
• Cadence Incisive Enterprise Simulator (IES) v9.2 and above
• Synopsys VCS and VCS MX 2009.12 and above