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2.1ClockControl
MMCCLK
(CLKRT)
Function clock for
MMC/SD controller
MMC/SD controller
MMC/SD
input clock
card
MMC/SD
Memory clock
on CLK pin
PeripheralArchitecture
Therearetwoclocks,thefunctionclockandthememoryclock,intheMMC/SDcontroller(Figure4).
ThefunctionclockdeterminestheoperationalfrequencyoftheMMC/SDcontrollerandistheinputclock
totheMMC/SDcard(s).TheMMC/SDcontrolleriscapableofoperatingwithafunctionclockupto
100MHz.
ThememoryclockappearsontheSD_CLKpinoftheMMC/SDcontrollerinterface.Thememoryclock
controlsthetimingofcommunicationbetweentheMMC/SDcontrollerandtheconnectedmemorycard.
ThememoryclockisgeneratedbydividingthefunctionclockintheMMC/SDcontroller.Thedivide-down
valueissetbyCLKRTbitsintheMMCmemoryclockcontrolregister(MMCCLK)andisdeterminedbythe
followingequation:
memoryclockfrequency=functionclockfrequency/(2×(CLKRT+1))
Figure4.MMC/SDControllerClockingDiagram
(1)MaximummemoryclockfrequencyinMMCcardcanbe20MHz.
(2)MaximummemoryclockfrequencyinSDcardcanbe50MHz.
MultimediaCard(MMC)/SecureDigital(SD)CardController 12SPRUE30B–September2006
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