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4.18MMCFIFOControlRegister(MMCFIFOCTL)
Registers
TheMMCFIFOcontrolregister(MMCFIFOCTL)isshowninFigure39anddescribedinTable25.
Figure39.MMCFIFOControlRegister(MMCFIFOCTL)
3116
Reserved
R-0
15543210
ReservedACCWDFIFOLEVFIFODIRFIFORST
R-0R/W-0R/W-0R/W-0R/W-0
LEGEND:R/W=Read/Write;R=Readonly;-n=valueafterreset
Table25.MMCFIFOControlRegister(MMCFIFOCTL)FieldDescriptions
BitFieldValueDescription
31-5Reserved0Reserved
4-3ACCWD0-3hAccesswidth.UsedbyFIFOcontroltodeterminefull/emptyflag.
0CPU/EDMAaccesswidthof4bytes
1hCPU/EDMAaccesswidthof3bytes
2hCPU/EDMAaccesswidthof2bytes
3hCPU/EDMAaccesswidthof1byte
2FIFOLEVFIFOlevel.SetsthethresholdlevelthatdetermineswhentheEDMArequestandtheFIFOthreshold
interruptaretriggered.
0EDMArequestevery128bitssent/received.
1EDMArequestevery256bitssent/received.
1FIFODIRFIFOdirection.DeterminesiftheFIFOisbeingwrittentoorreadfrom.
0ReadfromFIFO.
1WritetoFIFO.
0FIFORSTFIFOreset.ResetstheinternalstateoftheFIFO.
0FIFOresetisdisabled.
1FIFOresetisenabled.
MultimediaCard(MMC)/SecureDigital(SD)CardController 58SPRUE30B–September2006
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