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Chapter 4: BIOS
4-5
Channel Interleaving
Selects the channel-interleaving memory scheme when this function is
supported by the processor. The options are Disabled, Address Bits 6,
Address Bits 12, XOR of Address Bits [20:16, 6] and XOR of Address
Bits [20:16, 9].
Mem Clk Tristate C3/ALTVID
Use this setting to Enable or Disable memory clock tristate during C3
and ALT VID.
Memory Hole Remapping
When "Enabled", this feature enables hardware memory remapping around
the memory hole. Options are Enabled and Disabled.
CS Sparing
This setting will reserve a spare memory rank in each node when enabled.
Options are Enable and Disable.
DCT Unganged Mode
This setting enables unganged DRAM mode (64-bit). Options are Auto
(ganged mode) and Always (unganged mode).
Power Down Enable
This setting enables or disables DDR power down mode. Options are
Enabled and Disabled.
Power Down Mode
This sets the power down mode. Options are Channel and Chip Se-
lect.
ECC Confi guration
ECC Mode
This submenu affects the DRAM scrub rate based on its setting. Options
include Disabled, Basic, Good, Super, Max and User. Selecting User
activates the other options for user setting.