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Page 126 Epson Research and Development
Vancouver Design Center
S1D13708 Hardware Functional Specification
X39A-A-001-02 Issue Date: 02/03/07
8.3.4 Panel Configuration Registers
bit 7 Panel Data Format Select
When this bit = 0, 8-bit single color passive LCD panel data format 1 is selected. For AC
timing see Section 6.4.5, “Single Color 8-Bit Panel Timing (Format 1)” on page 78.
When this bit = 1, 8-bit single color passive LCD panel data format 2 is selected. For AC
timing see Section 6.4.6, “Single Color 8-Bit Panel Timing (Format 2)” on page 80.
bit 6 Color/Mono Panel Select
When this bit = 0, a monochrome LCD panel is selected.
When this bit = 1, a color LCD panel is selected.
bits 5-4 Panel Data Width Bits [1:0]
These bits select the data width size of the LCD panel.
bit 3 HRTFT/D-TFD Control Bit
This bit selects one of two modes of operation for HR-TFT/D-TFD panels depending on
the panel resolution. This bit has no effect for other panel types.
Note
This bit sets some internal non-configurable timing values for the selected panel. How-
ever, all panel configuration registers (REG[12h] - REG[27h]) still require program-
ming with the appropriate values for the selected panel. For panel AC timing, see
Section 6.4, “Display Interface” on page 68.
Panel Type Register
REG[10h] Read/Write
Panel Data
Format Select
Color/Mono.
Panel Select
Panel Data Width Bits 1-0
HRTFT/
D-TFD
Control Bit
n/a Panel Type Select Bits 1-0
76543210
Table 8-5: Panel Data Width Selection
Panel Data Width Bits [1:0]
Passive Panel Data Width
Size
Active Panel Data Width Size
00 4-bit 9-bit
01 8-bit 12-bit
10 16-bit 18-bit
11 Reserved Reserved
Table 8-6: HRTFT/D-TFD Panel Resolution Selection
HRTFT/D-TFD Control Bit HR-TFT Resolution D-TFD Resolution
0 160x160 160x240
1 320x240 320x240