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Page 182 Epson Research and Development
Vancouver Design Center
S1D13708 Hardware Functional Specification
X39A-A-001-02 Issue Date: 02/03/07
Panning
Panning is achieved by changing the Display Start Address register:
• Increment/decrement the Display Start Address register pans the display window
right/left by 32 bits, e.g. 4 pixels in 8-bpp mode.
• Increase/decrease the Display Start Address register by an amount equals to the Memory
Address Offset pans the display window down/up by 1 line.
12.4 270° SwivelView™
270° SwivelView™ requires the Memory Clock (MCLK) to be at least 1.25 times the
frequency of the Pixel Clock (PCLK), i.e. MCLK ≥ 1.25PCLK.
The following figure shows how the programmer sees a 320x480 portrait image and how
the image is being displayed. The application image is written to the S1D13708 in the
following sense: A–B–C–D. The display is refreshed by the S1D13708 in the following
sense: C-A-D-B.
Figure 12-3 Relationship Between The Screen Image and the Image Refreshed in 270° SwivelView.
image seen by programmer
= image in display buffer
480
SwivelView
window
480
320
AB
C
D
D
C
B
A
320
SwivelView
window
image refreshed by S1D13708
physical memory
display start address
(panel origin)
start address