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Page 202 Epson Research and Development
Vancouver Design Center
S1D13708 Hardware Functional Specification
X39A-A-001-02 Issue Date: 02/03/07
The following shows an example of a “register read” with Mode 80.
Figure 15-8 Sample timing of “register read” with Mode 80
1. write register address (command write). Command write is always the lower byte.
2. read register data (data read). Even numbered register uses the lower byte.
3. write register address (command write).
4. read register data (data read). Demonstrates how to access an odd numbered register
using the high byte. Note that the low byte could also have been used by asserting
WRL# instead of WRU#.
5. write register address (command write).
6. read register data (data read). Word accesses (16-bit) use the lower byte for the lower
register number and the higher byte for the higher register number.
A0
CS#
WRU#
WRL#
RDU#
RDL#
D[7:0]
D[15:8]
CMD0 CMD1 CMD2 CMD4
DATA1
DATA0
DATA3
DATA2
DATA4
command write
even number odd number
data read
command write command write command write
even number even number
data read data read
data read
byte access byte access
word access byte access
1 2 3 4 5 6
DATA3
DATA2
Big Endian
D[7:0]
D[15:8]
Little Endian
STEP