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Epson Research and Development Page 9
Vancouver Design Center
Interfacing to the Motorola MC68VZ328 Dragonball Microprocessor S1D13708
Issue Date: 01/11/25 X39A-G-016-01
3 S1D13708 Host Bus Interface
The S1D13708 directly supports multiple processors. The S1D13708 implements a
Dragonball Host Bus Interface which directly supports the Motorola MC68VZ328 micro-
processor.
The Dragonball Host Bus Interface is selected by the S1D13708 on the rising edge of
RESET#. After RESET# is released, the bus interface signals assume their selected config-
uration. For details on the S1D13708 configuration, see Section 4.2, “S1D13708 Hardware
Configuration” on page 12.
The S1D13708 clock (CLKI) is taken from the system host bus. The system clock source
will drive all required internal clocks. If they are not used, the CLKI2 and XTAL inputs
should be tied to ground.
3.1 Host Bus Interface Pin Mapping
The following table shows the functions of each Host Bus Interface signal.
Table 3-1: Host Bus Interface Pin Mapping
S1D13708
Pin Names
Motorola MC68VZ328
AB[16:0] A[16:0]
DB[15:0] D[15:0]
WE1# UWE
CS# CSx
M/R# External Decode
CLKI CLKO
BS#
Connect to IO
VDD
from the
S1D13708
RD/WR#
Connect to IO
VDD
from the
S1D13708
RD# OE
WE0# LWE
WAIT# DTACK
RESET# System RESET