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Epson Research and Development Page 155
Vancouver Design Center
Hardware Functional Specification S1D13708
Issue Date: 02/03/07 X39A-A-001-02
bits 1-0 Extended Panel Type Bits [1:0]
These bits override the setting in REG[10h] bits 1-0 and allow selection of the alternate
TFT panel types.
bit 0 Memory Access Select Bit
This register only has an effect when the Indirect Interface is enabled (CNF[2:0] =
111). This bit selects the type of memory access, byte or word, used for memory accesses
when the Indirect Interface is enabled.
When this bit = 0, byte or word accesses are allowed. For Mode 68, EBL and EBU indi-
cate the transfer size. For Mode 80, WRU#, WRL#, RDU#, and RDL# indicate the trans-
fer size.
When this bit = 1, only word accesses are allowed and WRU#, RDU#, EBU are ignored
when determining the transfer size. This bit affects memory accesses only, the signals are
not ignored for register accesses.
Note
All word accesses must be byte aligned on even addresses.
Extended Panel Type Register
REG[C5h] Read/Write
n/a Extended Panel Type Bits 1-0
7 6 5 4 3 210
Table 8-20: Extended Panel Type Selection
REG[C5h] Bits [1:0] Panel Type
00 no effect from REG[10h] bits 1-0
01 TFT Type 2
10 TFT Type 3
11 TFT Type 4
Memory Access Select Register
REG[C6h] Read/Write
n/a
Memory
Access Select
7 6 5 4 3 2 10