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Page 12 Epson Research and Development
Vancouver Design Center
S1D13708 Interfacing to the Motorola RedCap2
X39A-G-014-01 Issue Date: 01/11/06
4 REDCAP2 to S1D13708 Interface
4.1 Hardware Description
The interface between the S1D13708 and the REDCAP2 requires no external glue logic.
The information in this section describes the environment necessary to connect the
S5U13708B00C Evaluation Board and the Motorola DSP56654 Application Development
Module (ADM). For a list of connections for the pins and signals of the REDCAP2 see
Table 4-1:,“List of Connections for REDCAP2 ADM” on page 13.
The following figure demonstrates a typical implementation of the S1D13708 to the
REDCAP2 interface.
Figure 4-1: Typical Implementation of REDCAP2 to S1D13708 Interface
REDCAP2
S1D13708
A[16:0]
D[15:0]
CS1
R/W
OE
EB1
CLK
RESET
AB[16:0]
DB[15:0]
CS#
RD/WR#
RD#
WE0#
CLKI
RESET#
A17
M/R#
BS#
WE1#EB0
System
When connecting the S1D13708 RESET# pin, the system designer should be aware of all
conditions that may reset the S1D13708 (e.g. CPU reset can be asserted during wake-up
from power-down modes, or during debug states).
**Note:
IO V
DD
*Note: This example uses CS1. CSn can be any of CS0-CS4.