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Page 12 Epson Research and Development
Vancouver Design Center
S1D13708 Interfacing to the Motorola MPC821 Microprocessor
X39A-G-009-01 Issue Date: 01/11/06
Figure 2-3: “GPCM Memory Devices Timing” illustrates a typical cycle for a memory
mapped device using the GPCM of the Power PC.
Figure 2-3: GPCM Memory Devices Timing
2.3.2 User-Programmable Machine (UPM)
The UPM is typically used to control memory types, such as Dynamic RAMs, which have
complex control or address multiplexing requirements. The UPM is a general purpose
RAM-based pattern generator which can control address multiplexing, wait state gener-
ation, and five general-purpose output lines on the MPC821. Up to 64 pattern locations are
available, each 32 bits wide. Separate patterns may be programmed for normal accesses,
burst accesses, refresh (timer) events, and exception conditions. This flexibility allows
almost any type of memory or peripheral device to be accommodated by the MPC821.
In this application note, the GPCM is used instead of the UPM, since the GPCM has enough
flexibility to accommodate the S1D13708 and it is desirable to leave the UPM free to
handle other interfacing duties, such as EDO DRAM.
A[0:31]
D[0:31]
TS
TA
CLOCK
Valid
CS
WE
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