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Epson Research and Development Page 147
Vancouver Design Center
Hardware Functional Specification S1D13708
Issue Date: 02/03/07 X39A-A-001-02
bit 4 GPIO4 Pin IO Status
When GPIO4 is not used as a LCD signal and GPIO4 is configured as an output, writing a
1 to this bit drives GPIO4 high and writing a 0 to this bit drives GPIO4 low.
When GPIO4 is not used as a LCD signal and GPIO4 is configured as an input, a read
from this bit returns the status of GPIO4.
When a D-TFD panel is enabled (REG[10h] bits 1:0 = 11) and a 1 is written to this bit, the
D-TFD signal RES signal is enabled.
When a D-TFD panel is enabled (REG[10h] bits 1:0 = 11) and a 0 is written to this bit, the
D-TFD signal RES signal is forced low.
When a TFT Type 3 panel is enabled (REG[C5h] bits 1:0 = 10) and a 1 is written to this
bit, the GPIO4 (VCOM) signal is enabled.
When a TFT Type 3 panel is enabled (REG[C5h] bits 1:0 = 10) and a 0 is written to this
bit, the GPIO4 (VCOM) signal is forced low.
bit 3 GPIO3 Pin IO Status
When GPIO3 is not used as a LCD signal and GPIO3 is configured as an output, writing a
1 to this bit drives GPIO3 high and writing a 0 to this bit drives GPIO3 low.
When GPIO3 is not used as a LCD signal and GPIO3 is configured as an input, a read
from this bit returns the status of GPIO3.
When a D-TFD panel is enabled (REG[10h] bits 1:0 = 11) writing to this bit has no effect.
When a HR-TFT panel is enabled (REG[10h] bits 1:0 = 10) writing to this bit has no
effect.
When a TFT Type 2 panel is enabled (REG[C5h] bits 1:0 = 01) writing to this bit has no
effect.
When a TFT Type 3 panel is enabled (REG[C5h] bits 1:0 = 10) writing to this bit has no
effect.
bit 2 GPIO2 Pin IO Status
When GPIO2 is not used as a LCD signal and GPIO2 is configured as an output, writing a
1 to this bit drives GPIO2 high and writing a 0 to this bit drives GPIO2 low.
When GPIO2 is not used as a LCD signal and GPIO2 is configured as an input, a read
from this bit returns the status of GPIO2.
When a D-TFD panel is enabled (REG[10h] bits 1:0 = 11) writing to this bit has no effect.
When a HR-TFT panel is enabled (REG[10h] bits 1:0 = 10) writing to this bit has no
effect.
When a TFT Type 2 panel is enabled (REG[C5h] bits 1:0 = 01) writing to this bit has no
effect.
When a TFT Type 3 panel is enabled (REG[C5h] bits 1:0 = 10) writing to this bit has no
effect.