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Epson Research and Development Page 13
Vancouver Design Center
Connecting to a Micro-Controller via the Indirect Interface S1D13708
Issue Date: 01/12/12 X39A-G-020-01
4 Micro-Controller to S1D13708 Interface
4.1 Hardware Connections
The interface between the S1D13708 and a micro-controller requires no external logic if
there are enough IO lines, and voltage levels are the same. As an example; the MicroChip
P18C452 micro-controller has 34 IO lines available for use as general input/output lines,
1536 bytes of RAM, and runs 20Mhz at 3.3 volts.
To interface the S1D13708 to the P18C452 using Indirect Mode 68 requires only four
output lines acting as control signals and eight bidirectional lines acting as the data bus.
Using only 12 IO lines, a fully functioning S1D13708 LCD controller can be attached to
the micro-controller. If a 16-bit data bus is desired, eight more bidirectional lines from the
P18C452 can be connected to DB[15:8] and one more output line, acting as EBH,
connected to the WE1# pin of the S1D13708.
The S1D13708 has 80K of embedded RAM which is used as the LCD display buffer.
Depending on the LCD panel size, some of this memory can be used to store data for the
micro-controller.
For example, using an Epson 160x160 ND-TFD panel in 8 bpp mode, the S1D13708 only
requires 25K bytes of display buffer memory and will have 55K bytes of memory available
for data storage which the P18C452 can use. If the bit-per-pixel setting is changed to 16
bpp, only 30K bytes of memory is available to the micro-controller for data storage.
Figure 4-1: Typical Implementation of Micro-Controller to S1D13708 Interface
MicroChip P18C452 S1D13708
EBL (RD3)
D[7:0] (RB[7:0])
System CLK
WE0#
DB[7:0]
RD#
AB[16:0]
DB[15:8]
CS#
CLKI
RESET#
BS#
System RESET
Note:
When connecting the S1D13708 RESET# pin, the system designer should be aware of all
conditions that may reset the S1D13708 (e.g. CPU reset can be asserted during wake-up
from power-down modes, or during debug states).
R/W# (RD2)
RD/WR#
M/R#
CS (RD0)
A0 (RD1)
WE1#