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Epson Research and Development Page 157
Vancouver Design Center
Hardware Functional Specification S1D13708
Issue Date: 02/03/07 X39A-A-001-02
bits 15-0 Ink Layer Transparent Color Bits [15:0]
The Ink Layer requires a transparent color to be selected. This transparent color is com-
pared with the values in the foreground image during display refresh. If the pixel value
matches the transparent color, the pixel from the background image is shown. If the pixel
value does not match the transparent color, the foreground image is shown.
For further information on the Ink Layer, see Section 14, “Ink Layer” on page 187.
bit 0 Ink Layer Enable
This bit controls whether the Ink Layer is enabled or disabled.
When this bit = 0, the Ink Layer is disabled.
When this bit = 1, the Ink Layer is enabled.
For further information on the Ink Layer, see Section 14, “Ink Layer” on page 187.
Note
Picture-in-Picture Plus (PIP
+
) is not available when the Ink Layer is enabled.
bits 5-4 XTAL Enable Bits [1:0]
These two bits enable the crystal input/drive circuitry.
When these bits = 00, the XTAL circuitry is disabled.
When these bits = 11, the XTAL circuitry is enabled.
For further information on the crystal usage, see Section 16, “Embedded Crystal Oscilla-
tor” on page 211.
bit 1 Extended PCLK / PWMCLK Source Select
This bit selects the source (between CLKI2 and XTAL) used for PCLK and the PWM
clock when CLKI2 is selected as the source for PCLK (see REG[05h] bits 1-0) and PWM
clock (see REG[B1h] bit 0).
When this bit = 0, the source used for PCLK and PWMCLK is CLKI2.
When this bit = 1, the source used for PCLK and PWMCLK is XTAL.
Ink Layer Register
REG[C9h] Read/Write
n/a
Ink Layer
Enable
7 6 5 4 3 2 10
BCLK Source Select Register
REG[CAh] Read/Write
n/a XTAL Enable Bits 1-0 n/a
Extended
PCLK/PWMCLK
Source Select
BCLK Source
Select
7 6543 210