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Page 190 Epson Research and Development
Vancouver Design Center
S1D13708 Hardware Functional Specification
X39A-A-001-02 Issue Date: 02/03/07
15.1 Mode 68
The following shows an example of a “register write” with Mode 68.
Figure 15-1 Sample timing of “register write” with Mode 68
1. write register address (command write).
2. write register data (data write). Even numbered register uses the high byte.
3. write register address (command write).
4. write register data (data write). Demonstrates how to access an odd numbered register
using the low byte. Note that the high byte could also have been used by asserting
EBU instead of EBL.
5. write register address (command write)
6. write register data (data write). Word accesses (16-bit) use the higher byte for the even
register address and the lower byte for the odd register address.
1
A0
CS#
EBL
R/W#
EBU
D[7:0]
D[15:8]
CMD0 CMD1 CMD2 CMD4DATA1
DATA0
DATA3
DATA2
DATA4
command write
even number odd number
data write
command write command write command write
even number even number
data write data write
data write
byte access byte access
word access
byte access
2 3 4 5 6
DATA2
DATA3
Little Endian
D[7:0]
D[15:8]
(Big Endian)
STEP