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Epson Research and Development Page 11
Vancouver Design Center
Connecting to the Sharp HR-TFT Panels S1D13708
Issue Date: 01/11/25 X39A-G-011-01
2.2 HR-TFT MOD Signal
The HR-TFT panel uses an input signal (MOD) to control the power-on sequencing of the
panel. This HR-TFT signal should not be confused with the S1D13708 signal DRDY
(referred to as MOD for passive panels).
To power-on the HR-TFT panel, MOD must be held low until the power supply has been
turned on for more than two FRAMES. To power-off the HR-TFT panel, MOD must be
forced low before the power supply is turned off. This sequencing requires two software
controlled GPIO pins from the S1D13708 (see Figure 2-4: “HR-TFT Power-On/Off
Sequence Timing” ).
Figure 2-4: HR-TFT Power-On/Off Sequence Timing
Table 2-1: HR-TFT Power-On/Off Sequence Timing
Symbol Parameter Min Max Units
t1
LCD Power (VSHD) active to Power Save Mode disabled
0ns
t2
LCD signals low to LCD Power (VSHD) inactive
0ns
t3
Power Save Mode disabled to LCD Power (other) active
0ns
t4
LCD Power (other) inactive to Power Save Mode enabled
0ns
t5
LCD Power (other) active to MOD active
2FRAME
t6
MOD inactive to LCD Power (other) inactive
0ns
t7
Power Save Mode disabled to LCD signals active
20 ns
t8
Power Save Mode enabled to LCD signals low
20 ns
LCD Signals****
MOD (GPO)
t1
*It is recommended to use one of the general purpose IO pins GPIO[6:4] to control the digital power supply VSHD.
***The S1D13708 LCD power-on/off sequence is activated by programming the Power Save Mode Enable bit (REG[A0h] bit
0
****LCD Signals include: FPDAT[17:0], FPSHIFT, FPLINE, FPFRAME, and GPIO[3:0].
t5
Power Save
(REG[A0h] bit 0)
Mode Enable***
t6
Active
t3
t4
t2
GPIOy**
GPIOx*
t7
t8
(other power)
(VSHD power)
** It is recommended to use one of the general purpose IO pins GPIO[6:4] to control the other power supplies required
by the HR-TFT panel.