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Page 30 Epson Research and Development
Vancouver Design Center
S1D13708 Programming Notes and Examples
X39A-G-003-01 Issue Date: 01/11/20
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6.4 Enabling Power Save Mode
Power Save Mode must be enabled using the following steps.
1. Disable the LCD bias power using GPO0.
Note
The S5U13708B00B uses GPO0 to control the LCD bias power supplies. Your system
design may vary.
2. Wait for the LCD bias power supply to discharge. The discharge time must be based
on the time specified in the LCD panel specification.
3. Enable Power Save Mode - set REG[A0h] bit 0 to 1.
4. At this time, the LCD pixel clock source may be disabled (Optional).
5. Optionally, when the Memory Controller Power Save Status bit (REG[A0h] bit 3)
returns a 1, the Memory Clock source may be safely shut down.
6.5 Disabling Power Save Mode
Power Save Mode must be disabled using the following steps.
1. If the Memory Clock source is shut down, it must be started and the Memory Control-
ler Power Save Status bit must return a 0. If the pixel clock source is disabled, it
must be started before step 2.
2. Disable Power Save Mode - set REG[A0h] bit 0 to 0.
3. Wait for the LCD bias power supply to charge. The charge time must be based on the
time specified in the LCD panel specification.
4. Enable the LCD bias power using GPO0.
Note
The S5U13708B00B uses GPO0 to control the LCD bias power supplies. Your system
design may vary.