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Page 20 Epson Research and Development
Vancouver Design Center
S1D13708 Interfacing to the Motorola MPC821 Microprocessor
X39A-G-009-01 Issue Date: 01/11/06
4.6 Test Software
The test software to exercise this interface is very simple. It configures chip select 4 (CS4)
on the MPC821 to map the S1D13708 to an unused 256K byte block of address space and
loads the appropriate values into the option register for CS4. Then the software runs a tight
loop reading the 13708 Revision Code Register REG[00h]. This allows monitoring of the
bus timing on a logic analyzer.
The following source code was entered into the memory of the MPC821ADS using the
line-by-line assembler in MPC8BUG (the debugger provided with the ADS board). Once
the program was executed on the ADS, a logic analyzer was used to verify operation of the
interface hardware.
It is important to note that when the MPC821 comes out of reset, its on-chip caches and
MMU are disabled. If the data cache is enabled, then the MMU must be set up so that the
S1D13708 memory block is tagged as non-cacheable, to ensure that accesses to the
S1D13708 occurs in proper order, and also to ensure that the MPC821 does not attempt to
cache any data read from or written to the S1D13708 or its display buffer.
The source code for this test routine is as follows:
BR4 equ $120 ; CS4 base register
OR4 equ $124 ; CS4 option register
MemStart equ $42 0000 ; address of S1D13708 display buffer
RevCodeReg equ $40 0000 ; address of Revision Code Register
Start mfspr r1,IMMR ; get base address of internal registers
andis. r1,r1,$ffff ; clear lower 16 bits to 0
andis. r2,r0,0 ; clear r2
oris r2,r2,MemStart ; write base address
ori r2,r2,$0801 ; port size 16 bits; select GPCM; enable
stw r2,BR4(r1) ; write value to base register
andis. r2,r0,0 ; clear r2
oris r2,r2,$ffc0 ; address mask – use upper 10 bits
ori r2,r2,$0708 ; normal CS negation; delay CS ½ clock;
; inhibit burst
stw r2,OR4(r1) ; write to option register
andis. r1,r0,0 ; clear r1
oris r1,r1,MemStart ; point r1 to start of S1D13708 mem space
Loop lbz r0,RevCodeReg(r1) ; read revision code into r1
b Loop ; branch forever
end
Note
MPC8BUG does not support comments or symbolic equates. These have been added for
clarity only.