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Page 200 Epson Research and Development
Vancouver Design Center
S1D13708 Hardware Functional Specification
X39A-A-001-02 Issue Date: 02/03/07
15.2 Mode 80
Mode 80 supports byte and word access for both register and memory access. It also allows
both big and little endian modes. The following shows an example of a “register write” with
Mode 80.
Figure 15-7 Sample timing of “register write” with Mode 80
1. write register address (command write). Command write is always the lower byte.
2. write register data (data write). Even numbered register uses the low byte.
3. write register address (command write).
4. write register data (data write). Demonstrates how to access an odd numbered register
using the high byte. Note that the low byte could also have been used by asserting
WRL# instead of WRU#.
5. write register address (command write)
A0
CS#
WRU#
WRL#
RDU#
RDL#
D[7:0]
D[15:8]
CMD0 CMD1 CMD2 CMD4
DATA1
DATA0
DATA3
DATA2
DATA4
command write
even number odd number
data write
command write command write command write
even number even number
data write data write
data write
byte access byte access
word access byte access
1 2 3 4 5 6
DATA3
DATA2
Big Endian
D[7:0]
D[15:8]
Little Endian
STEP